RESUME
Consultant, AnyScale, USA
2019 - present
- Making Ray the state-of-the-art system for AI and distributed computing
Board Member, American Technion Society, USA
2019 - present
AI Research Intern, Intel Labs, USA
Summer 2019
1) NeuroVectorizer: End-to-End Vectorization with Deep Reinforcement Learning. Published in CGO 2020 (top conference in compilers).
2) A View on Deep Reinforcement Learning in System Optimization.
3) RLRDT: Closed Loop Dynamic Intel RDT Resource Allocation with Deep Reinforcement Learning
Chip Designer (R&D), Mellanox Technologies, Israel
2015 - 2016
Worked on creating design and automation tools that facilitated
the formal and dynamic verification process. Worked especially with
Python, scripting languages, C++, and Verilog.
Graduate Research Assistance, Technion, Israel
2015 - 2018
1. Head Teaching Assistant, Circuit Theory.
2. Head Teaching Assistant, Electronic Switching Circuits.
3. Supervisor of B.Sc. projects, VLSI Lab and Parallel Systems Lab.
4. Teaching Assistant, MATLAB.
Skills
Project Lead, Teamwork,
Python, TensorFlow, PyTorch, Android, JavaScript, CUDA, C, C++, C#, UNIX, XML, MATLAB, HTML, Regular Expressions, Assembly Language, SQL, Bluespec, Chisel, Verilog, Verilog-A, VHDL, Physical Design (Cadence Tools),
Languages
Work
Experience
Education
University of California, Berkeley
2018 - present
Ph.D. student, working with Prof. Krste Asanovic and Prof. Ion Stoica
Research Interests: Hardware/Software Codesign, Auto-Tuning, Machine Learning, Reinforcement Learning, ASIC Design, High Performance Computing, and Systolic Arrays.
Technion, Israel Institute of Technology
2016 - 2018, The Valedictorian
M.Sc., Electrical Engineering.
Finished 4-year track summa cum laude (top 3%) in three years.
Member of the President’s List of highest honors for excellent scholastic achievements every semester.
Technion, Israel Institute of Technology
2013 - 2016, The Valedictorian
B.Sc., Computer Engineering.
Finished 4-year track summa cum laude (top 3%) in three years.
Member of the President’s List of highest honors for excellent scholastic achievements every semester.
Classical/ Colloquial Arabic, Hebrew, English, Russian (intermediate)
Awards and Fellowships
1. The Valedictorian Honor (M.Sc.), Technion, 2019.
2. Open Gateway Fellowship, UC Berkeley, 2018.
3. The William Oldham Fellowship, UC Berkeley, 2018.
4. The Valedictorian Honor (B.Sc.), Technion, 2017.
5. Dean’s scholarship for excellent graduate students, Technion, 2016.
6. Full tuition scholarship for M.Sc. studies, Technion , 2016-2018.
7. The System Architecture Labs Cluster Prize for outstanding undergraduate projects (received twice), Technion, 2016.
8. Excellence award from Apple for excellent scholastic achievements,
Technion, 2016.
9. Member of the President’s List of highest honors for excellent scholastic achievements in all undergraduate semesters (top 3%), Technion, 2013-2016.
10. Full tuition scholarship for B.Sc. studies, Technion, 2013-2016.
Conference
Publications
1. Ameer Haj-Ali*, Qijing Huang*, William Moses, John Xiang, John Wawrzynek, Krste Asanovic, Ion Stoica “Juggling HLS Phase Orderings in Random Forests with Deep Reinforcement Learning,” Submitted.
2. Ameer Haj-Ali, Nesreen Ahmed, Ted Willke, Joseph Gonzalez, Krste Asanovic, Ion Stoica, ”A View on Deep Reinforcement Learning in System Optimization”, Submitted.
3. Keertana Settaluri, Ameer Haj-Ali, Qijing Huang, Suhong Moon, Kourosh Hakhamaneshi, Ion Stoica, Krste Asanovic, Borivoje Nikolic, “AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs,” Design, Automation & Test in Europe Conference & Exhibition (DATE 2020), March 2020.
4. Ameer Haj-Ali, Nesreen Ahmed, Ted Willke, Sophia Shao, Krste Asanovic, Ion Stoica, ”NeuroVectorizer: End-to-End Vectorization with Deep Reinforcement Learning”, International Symposium on Code Generation and Optimization 2020 (CGO 2020), February 2020.
5. Ameer Haj-Ali, Nesreen Ahmed, Ted Willke, Sophia Shao, Krste Asanovic, Ion Stoica, ”End-to-End Vectorization with Deep Reinforcement Learning”, Compiler, Architecture, and Tools Conference 2019 (CATC 2019), December 2019.
6. Ameer Haj-Ali, Nesreen Ahmed, Ted Willke, Sophia Shao, Krste Asanovic, Ion Stoica, ”Learning to Vectorize Using Deep Reinforcement Learning”, Workshop on ML for Systems at NeurIPS 2019, December 2019.
7. Ameer Haj-Ali*, Qijing Huang*, William Moses, John Xiang, Ion Stoica,
Krste Asanovic, John Wawrzynek, “AutoPhase: Compiler Phase-Ordering for High-Level Synthesis with Deep Reinforcement Learning,”
The 27th IEEE International Symposium On Field-Programmable Custom Computing Machines, (FCCM 2019), April 2019.
8. Ameer Haj-Ali, Rotem Ben-Hur, Nimrod Wald, and Shahar Kvatinsky, “Efficient Algorithms for In-memory Fixed Point Multiplication Using MAGIC,” IEEE International Symposium on Circuits and Systems (ISCAS 2018), May 2018.
9. Nishil Talati, Ameer Haj-Ali, Rotem Ben-Hur, Nimrod Wald, Ronny Ronen,
Pierre- Emmanuel Gaillardon, and Shahar Kvatinsky, “Practical Challenges in
Delivering the Promises of Real Processing-in-Memory Machines,” Design,
Automation & Test in Europe Conference & Exhibition (DATE 2018), March 2018.
10. John Reuben, Rotem Ben-Hur, Nimrod Wald, Nishil Talati, Ameer Haj-Ali, Pierre-Emmanuel Gaillardon, and Shahar Kvatinsky, “Memristive Logic: A Framework for Evaluation and Comparison,” 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2017), September 2017.
Journal
Publications
1. Rotem Ben-hur, Ronny Ronen, Ameer Haj-Ali, Debjyoti Bhattacharjee, Adi Eliahu, Natan Peled, and Shahar Kvatinsky, ”SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), July 2019.
2. Tzofnat Greenberg-Toledo, Roee Mazor, Ameer Haj-Ali, and Shahar Kvatinsky, ”Supporting the Momentum Training Algorithm Using a Memristor-Based Synapse,” IEEE Transactions on Circuits and Systems I: Regular Papers," January 2019.
3. Ameer Haj-Ali, Rotem Ben-Hur, Nimrod Wald, Ronny Ronen, and Shahar Kvatinsky, ”Not in Name Alone: a Memristive Memory Processing Unit for Real In-Memory Processing,” IEEE Micro, September 2018.
4. Ameer Haj-Ali, Rotem Ben-Hur, Nimrod Wald, Ronny Ronen, and Shahar Kvatinsky, “IMAGING: In-Memory AlGorithms for Image processiNG,” IEEE Transactions on Circuits and Systems I: Regular Papers, June 2018.
Book
Chapters
1. Ameer Haj-Ali, Ronny Ronen, Rotem Ben-Hur, Nimrod Wald, and Shahar Kvatinsky, ”Memristor-Based Processing-in-Memory and Its Application On Image Processing,” Elsevier.
2. Nishil Talati, Rotem Ben-Hur, Nimrod Wald, Ameer Haj-Ali, John Reuben,
and Shahar Kvatinsky, “mMPU - a Real Processing-in-Memory Architecture
to Combat the von Neumann Bottleneck,” Springer, 2020.
3. John Reuben, Rotem Ben-Hur, Nimrod Wald, Nishil Talati, Ameer Haj-Ali, Pierre- Emmanuel Gaillardon, and Shahar Kvatinsky, “ A Taxonomy and Evaluation Framework for Memristive Logic,” Springer, 2017.